The temperature rise in sub-micrometer silicon devices is predicted at present by solving the heat diffusion equation based on the Fourier law. The accuracy of this approach needs to be carefully examined for semiconductor devices in which the channel length is comparable with or smaller than the phonon mean free path. The phonon mean free path in silicon at room temperature is near 300 nm and exceeds the channel length of contemporary transistors. This work numerically integrates the two-dimensional phonon Boltzmann transport equation (BTE) within the silicon region of a silicon-on-insulator (SOI) transistor. The BTE is solved together with the classical heat diffusion equation in the silicon dioxide layer beneath the transistor. The predicted peak temperature rise is nearly 160 percent larger than a prediction using the heat diffusion equation for the entire domain. The disparity results both from phonon-boundary scattering and from the small dimensions of the region of strongest electron-phonon energy transfer. This work clearly shows the importance of sub-continuum heat conduction in modern transistors and will facilitate the development of simpler calculation strategies, which are appropriate for commercial device simulators.
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