Delamination of interfaces in integrated circuit (IC) packages gives rise to electrical and mechanical failures such as popcorn cracking. Hence it is important to be able to analyze the mechanics of delamination from small interfacial defects which may exist at interfaces due to contamination or random factors. This paper describes the mechanics of interfacial delamination and the application of the boundary element method to analyze delamination propagation at interfaces. Now, a crack tip at an interface between two materials has an order of singularity which is a function of the material properties. For an accurate analysis, a special variable-order singular boundary element has been developed and used. The effect of defect size and location along the pad-encapsulant interface on interfacial delamination has been studied. It was found that the energy release rate or stress intensity factor increases with defect size as well as proximity to the pad corner. This implies that when a small delamination near a pad corner delaminates the crack tip nearer the pad corner will propagate first. The analysis has also shown that this delamination, once started, will continue until the crack tip reaches the pad corner. If the variation of interface toughness as a function of mode mixity is known, the delamination propagation behavior can be determined. Depending on the shape of the curve describing the variation of interface toughness with mode mixity, the delamination growth can either be stable, catastrophic, or initially unstable followed by stable growth.
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e-mail: mpetayao@nus.edu.sg
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December 2003
Technical Papers
Numerical Simulation of Delamination in IC Packages Using a New Variable-Order Singular Boundary Element
A. A. O. Tay,
e-mail: mpetayao@nus.edu.sg
A. A. O. Tay
Centre for IC Failure Analysis and Reliability, Department of Mechanical Engineering, National University of Singapore, 9 Engineering Drive 1, Singapore 117576
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K. H. Lee,
K. H. Lee
Centre for IC Failure Analysis and Reliability, Department of Mechanical Engineering, National University of Singapore, 9 Engineering Drive 1, Singapore 117576
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K. M. Lim
K. M. Lim
Centre for IC Failure Analysis and Reliability, Department of Mechanical Engineering, National University of Singapore, 9 Engineering Drive 1, Singapore 117576
Search for other works by this author on:
A. A. O. Tay
Centre for IC Failure Analysis and Reliability, Department of Mechanical Engineering, National University of Singapore, 9 Engineering Drive 1, Singapore 117576
e-mail: mpetayao@nus.edu.sg
K. H. Lee
Centre for IC Failure Analysis and Reliability, Department of Mechanical Engineering, National University of Singapore, 9 Engineering Drive 1, Singapore 117576
K. M. Lim
Centre for IC Failure Analysis and Reliability, Department of Mechanical Engineering, National University of Singapore, 9 Engineering Drive 1, Singapore 117576
Contributed by the Electronic and Photonic Packaging Division for publication in the JOURNAL OF ELECTRONIC PACKAGING. Manuscript received November 2002. Associate Editor: L. Ernst.
J. Electron. Packag. Dec 2003, 125(4): 569-575 (7 pages)
Published Online: December 15, 2003
Article history
Received:
November 1, 2002
Online:
December 15, 2003
Citation
Tay, A. A. O., Lee , K. H., and Lim, K. M. (December 15, 2003). "Numerical Simulation of Delamination in IC Packages Using a New Variable-Order Singular Boundary Element ." ASME. J. Electron. Packag. December 2003; 125(4): 569–575. https://doi.org/10.1115/1.1604803
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